Akhil Gudivada
Design Verification Engineer at Astera Labs
Email:
a****@asteralabs.com
Phone Number: (***)-***-****
Graduate student at San Jose state universityCourse work:1. Universal verification methodologies (UVM) using System Verilog• Skills: System Verilog, Randomization and constraints, UVM env...
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ASTERA LABS
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Headquarters: Santa Clara, California, 95054, United States
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Industry Semiconductors
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Website asteralabs.com
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Employees 201-500
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Revenue 25 Million to 50 Million
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Answer: Akhil Gudivada works for Astera Labs as Design Verification Engineer
Answer: Akhil Gudivada’s role in Astera Labs is Design Verification Engineer
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Answer: Akhil Gudivada works in the industry of: Semiconductors
Answer: Akhil Gudivada is the current Design Verification Engineer at Astera Labs.... Read More
Answer: Akhil Gudivada works Astera Labs located at Santa Clara, California, 95054, United States
Answer: Astera Labs's Design Verification Engineer is Akhil Gudivada
Answer: Akhil Gudivada contact details:
- Phone number : (***)-***-****
- Email : a****@asteralabs.com
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