Cecil Symes
Design Verification Engineer at Astera Labs
Email:
c****@asteralabs.com
Phone Number: (***)-***-****
Design Verification Engineer at Astera Labs, Inc. located in Santa Clara, California. Working with SystemVerilog and UVM to verify and validate designs pre-silicon.Graduated with a Master...
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ASTERA LABS
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Headquarters: Santa Clara, California, 95054, United States
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Industry Semiconductors
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Website asteralabs.com
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Employees 201-500
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Revenue 25 Million to 50 Million
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Answer: Cecil Symes is the current Design Verification Engineer at Astera Labs.... Read More
Answer: Cecil Symes works Astera Labs located at Santa Clara, California, 95054, United States
Answer: Astera Labs's Design Verification Engineer is Cecil Symes
Answer: Cecil Symes contact details:
- Phone number : (***)-***-****
- Email : c****@asteralabs.com
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