Indiana Integrated Circuits
Research, 1400 E. Angela Blvd., South Bend, Indiana, 46617, United States, 1-10 Employees
Phone Number: +15*********
Who is INDIANA INTEGRATED CIRCUITS
Indiana Integrated Circuits, LLC (IIC) was created by two University of Notre Dame researchers for the purpose of commercializing a revolutionary microchip interconnect and packaging tech...
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Headquarters: 1400 E. Angela Blvd., South Bend, Indiana, 46617, United States
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Date Founded: 2009
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Employees: 1-10
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Revenue: Under $1 Million
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Active Tech Stack: See technologies
SIC Code: 
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Frequently Asked Questions Regarding Indiana Integrated Circuits
Answer: Indiana Integrated Circuits's headquarters are located at 1400 E. Angela Blvd., South Bend, Indiana, 46617, United States
Answer: Indiana Integrated Circuits's phone number is +15*********
Answer: Indiana Integrated Circuits's official website is https://indianaic.com
Answer: Indiana Integrated Circuits's revenue is Under $1 Million
Answer: Indiana Integrated Circuits's SIC: 3679
Answer: Indiana Integrated Circuits's NAICS: 334419
Answer: Indiana Integrated Circuits has 1-10 employees
Answer: Indiana Integrated Circuits is in Research
Answer: Indiana Integrated Circuits contact info: Phone number: +15********* Website: https://indianaic.com
Answer: Indiana Integrated Circuits, LLC (IIC) was created by two University of Notre Dame researchers for the purpose of commercializing a revolutionary microchip interconnect and packaging technology, Quilt Packaging (QP). Working closely with customers and partners, the IIC team assists in the implementation of QP into existing process flows, performs proof-of-concept prototyping, and develops application-specific solutions for licensees. IIC's patented technology delivers unprecedented microchip integration options to designers, enabled by the ultra-low-loss characteristics of Quilt Packaging interconnections, sub-micron chip-to-chip alignment, and chip-to-chip gaps as small as five microns. In addition to enabling an entirely new class of system designs, utilizing QP can result in significant cost reduction by partitioning large, poorer-yielding chips and reconstituting them from smaller, higher yielding chips, without reducing performance or functionality. Improvements in time-to-market, power consumption, form-factor and yield are possible with adoption of QP, as well as an increased flexibility in mixing and matching IP cores and existing designs.
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